As the performance of integrated circuits particularly memory chips, rises the demands on testing also increase. At operating frequencies in the range of 500 MHz to 1 GHz, effects come to the foreground which were previously negligible for low-frequency signals. Particularly in the case of the “wafer test”, in which a test device is used to test signals directly from chips on the wafer. The problem of parasitic effects due to relatively long signal paths in comparison with a test housing of the chips need to be overcome.
Another disadvantage is the use of needles or other resilient probe contacts giving rise to intense reciprocal effects as a result of the very short distance between the two sides in the region of the needle arrangement. These reciprocal effects can influence or interfere with the signals. Particularly in the case of digital signals with a low voltage amplitude, the signal influencing or crosstalk limits the maximum signal frequency which can be used and the input and output data windows. In the case of analog signals, the signal-to-noise ratio and hence the measurement resolution and sensitivity of the system are reduced.
Increased coupling of capacitive or inductive type reduces the yield during the wafer test and limits the testability of critical parameters.
The conventional contact technology attenuates the amplitude of the signal on the basis of frequency. Reflections cause ripples in the signal profile which can result in erroneous evaluation.
To date, the parasitic effects have been reduced by using materials and design rules which differ from standard manufacturing practice of the probe cards. This has resulted in a drastic price increase. High-performance probe cards are therefore between 1.5 and 3 times more expensive than corresponding cards for standard applications.